发明名称 |
DATA PROCESSOR |
摘要 |
<p>PROBLEM TO BE SOLVED: To shorten a time needed for stabilization of a clock oscillation and also to effectively operate a peripheral circuit for reduction of power consumption of a data processor by supplying a generated alternate clock to the peripheral circuit in a power saving mode. SOLUTION: A peripheral circuit oscillation circuit 1 is operated in a sleep mode by an external trigger signal EXTTRG. Then only an AD converter 2 serving as a peripheral circuit can be operated by a generated peripheral circuit clockϕCR in a sleep mode and at a speed accordant with the clockϕCR. Thus, it's not required to cancel the sleep mode nor to actuate a system clockϕ. Then only the peripheral circuit is effectively operated with the reduction of power consumption. When the AD conversion is over in a sleep mode, a single-chip microcomputer 200 can be started by the clockϕwhich is outputted from the circuit 1.</p> |
申请公布号 |
JPH11143571(A) |
申请公布日期 |
1999.05.28 |
申请号 |
JP19970303219 |
申请日期 |
1997.11.05 |
申请人 |
MITSUBISHI ELECTRIC CORP;MITSUBISHI DENKI SYSTEM LSI DESIGN KK |
发明人 |
YAMAZOE HIROSHI;SUZUKI SHINICHI |
分类号 |
G06F1/04;G06F1/06;G06F1/32;(IPC1-7):G06F1/04 |
主分类号 |
G06F1/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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