| 摘要 |
PROBLEM TO BE SOLVED: To provide a high-speed carry skip adder of two or more stages. SOLUTION: Plural ripple adders are provided, at least a part of the ripple adders among the plural ripple adders are grouped and carry signals are transmitted to a certain group or the group of a one higher order. Then, this adder is provided with a circuit for calculating C=C2+F.C1 by using the carry signals C1 from the certain group to the group of the one higher order, signals F for indicating whether or not the output of a full adder within the group of the one higher order is present as 1 and the carry signals C2 relating to the ripple adder of a highest order within the group of the one higher order. |
