发明名称 |
SYNCHRONIZATION ACQUIRING CIRCUIT |
摘要 |
A synchronization acquiring circuit for stably acquiring frame synchronization without pseudo-synchronization lock during reception at a low C/N ratio. The C/N ratio of a transmission path is determined by a C/N ratio determining circuit (9) and a correlation detection reference value is determined on the basis of the determined C/N ratio. The synchronization pattern of a received frame is detected by a frame synchronization detecting circuit (2). The bits of the synchronization pattern of the received frame are compared with those of a frame synchronization pattern on the transmission side by a frame synchronizing circuit (5) to determine the number of coincided bits. The frame synchronization is regarded as detected when the determined number of bits of each frame is equal to or larger than the correlation detection value. When a reception signal phase vector distribution determining circuit (8) detects that a distribution vector of signal point positioning of a TMCC interval is normal and a burst symbol signal error measuring/judging circuit (10) judges that the distribution vector of a burst symbol signal is normal, synchronization is regarded as established.
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申请公布号 |
CA2310500(A1) |
申请公布日期 |
1999.05.27 |
申请号 |
CA19982310500 |
申请日期 |
1998.11.19 |
申请人 |
KABUSHIKI KAISHA KENWOOD |
发明人 |
SHIRAISHI, KENICHI;HASHIMOTO, AKINORI;HORII, AKIHIRO;KATOH, HISAKAZU |
分类号 |
H04J3/06;H04L1/20;H04L7/00;H04L7/08;H04L27/22;(IPC1-7):H04L27/22 |
主分类号 |
H04J3/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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