| 摘要 |
<p>An asynchronous transfer mode switch employing a plurality of physically separate but logically connected memory modules (40) operates under a decentralized pipeline control, where the entire switching apparatus is devided into multiple independent stages for their operation in a pipeline fashion to increase overall switching capacity. Incoming ATM cells (1) are assigned self-routing parameters by a self-routing parameter assignment circuit (14) using computed new parameters for the received cells based on the cells' output destination and the state of local variables. The self-routing parameters are attached as an additional routing tag to each incoming cells for their propagation through various stages of the switching apparatus. Each of the memory modules is independent and performs memory management with its local controller. The ATM switching is capable of providing high throughput performance under various traffic types with the decentralized switching control, pipeline processing of ATM cells sharing of the global buffer space and its ability to realize various buffer sharing schemes.</p> |
