| 摘要 |
Apparatus for identifying ATM cell boundaries in a bit stream. A CRC unit (21) operates on a 40-bit (header-length) sequence of bits in a shift register (20) fed with the bit stream to calculate an HEC (header error check) function from the oldest (4) bytes of the sequence. Comparator (22) compares the result with the actual 5th byte of the sequence to detect matches. All possible 40-bit sequences are checked in this way. A FIFO memory (26) stores the position of matches over the length of a cell, in the form of time counts from a cyclic counter (25). For each match from comparator (22), a subtractor (28), comparator (29), and gate (30) determine whether there is a coincidence with a stored value in the FIFO, i.e. whether there was also a match exactly 424 bits (1 cell length) ago. To reduce the chance of spurious coincidences, further FIFOs may be connected in series and multiple coincidences detected. |
