发明名称 Handling exceptions in a pipelined data processing apparatus
摘要 A data processing apparatus and method is provided, the apparatus comprising an execution unit having a plurality of pipelined stages for executing instructions, such that a maximum of "n' instructions can be being executed simultaneously within the execution unit. Further, a set of at least "n' logical exception registers are provided, each exception register being capable of storing a number of exception attributes associated with an instruction for which an exception has been detected during execution by the execution unit. In the event of an exception being detected during execution of a first instruction, the execution unit is arranged to: (i) store in a first of said exception registers said exception attributes associated with said first instruction; and (ii) to continue executing any remaining instructions already in the pipelined stages at the time the exception was detected. The execution unit is further arranged to store in said exception registers the exception attributes associated with any of the remaining instructions for which an exception is detected during execution, whereby the exception attributes stored in the exception registers can be provided to an exception processing tool for use in recovering from any exceptions occurring during processing of said first instruction and said remaining instructions. By this approach, when the exception processing tool is invoked, then it can deal with any exceptions arising from the instructions executed by the pipeline, and the data processing apparatus can then continue with the next instruction, without the need to re-execute any of the instructions that were in the pipeline at the time the first exception was detected.
申请公布号 GB9907257(D0) 申请公布日期 1999.05.26
申请号 GB19990007257 申请日期 1999.03.29
申请人 ARM LIMITED 发明人
分类号 G06F9/38 主分类号 G06F9/38
代理机构 代理人
主权项
地址