| 摘要 |
A frequency dividing circuit, which is easy to form as an IC and which offers reduction both in size and power consumption, has a register "a" for storing the difference between the denominator and the numerator of the fractional frequency dividing ratio, another register "b" for storing the numerator of the fractional frequency dividing ratio, a selector for selecting one of the registers and connecting the selected register to a computing unit, a flip-flop for picking up the output from the computing unit in timing with the signal to be frequency-divided, a comparator for comparing the value stored in the register "a" and the value held by the flip-flop, and a logical circuit for computing AND of the output from the comparator and the signal to be frequency-divided.
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