发明名称 |
Method of forming a semiconductor structure having reduced threshold voltage and high punch-through tolerance |
摘要 |
A power MOSFET (Metal Oxide Semiconductor Field Effect Transistor) device formed on a semiconductor substrate having a body region of a first conductivity type diffused in a semiconductor substrate with an epitaxial layer of a second conductivity type. There is also a source region of a second conductivity type formed in the body region. A portion of the body region adjacent to the source region is compensated by ion implanting a material of the second conductivity type in the portion of the body region such that the impurity concentration of the body region at the portion is reduced. As a consequence, with reduced impurity charge in the body region adjacent to the source, the threshold voltage of the MOSFET device is lowered but at no comprise in punch-through tolerance because the reduction in charge is remote from the origin of the depletion layer which is located at the boundary between the body region and the epitaxial layer.
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申请公布号 |
US5907776(A) |
申请公布日期 |
1999.05.25 |
申请号 |
US19970891546 |
申请日期 |
1997.07.11 |
申请人 |
MAGEPOWER SEMICONDUCTOR CORP. |
发明人 |
HSHIEH, FWU-IUAN;SO, KOON CHONG |
分类号 |
H01L21/336;H01L29/10;H01L29/78;(IPC1-7):H01L21/336 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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