| 摘要 |
PROBLEM TO BE SOLVED: To form a DRAM cell array of a high package density, by a method wherein first and second source and drain regions are connected to a memort condenser and a bit line extending in a direction of crossing a word line. SOLUTION: Parallel second trenchs are formed in a substrate 1a, and a semiconductor structure having one source/drain region S/D1a of vertical selection transistors and a channel region Kaa is provided therebetween, and the source/drain region S/D1a forms a channel stop region Ca adjacent to two edges. Two edge gate dielectrics Gda are provided and a word line W1a is formed in the second trench, and a memory condenser and a bit line connected to a first source/drain region S/D1a are formed and are connected to a second source/drain region S/D2a. Accordingly, it is possible to form a DRAM cell array of high package density having 1 transistor memory cell. |
