| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a semiconductor device by which a memory can be tested easily with minimum necessary additional circuits. SOLUTION: In a normal operation state, ifϕis kept high-leveled, addresses and data generated by a logic unit 2 are supplied to a memory 1 through flip- flops 3. In a test state, ifϕ1 which is different from the clockϕ2 of the memory 1 and the logic unit 2 is supplied asϕ, the flip-flops 3 supply the addresses and data from the logic unit 2 to the memory 1 with a rising timing ofϕ1.</p> |
