| 摘要 |
PROBLEM TO BE SOLVED: To provide a digital PLL circuit capable of expanding a lock range and a capture range and switching a method for controlling the oscillation frequency of a VCO. SOLUTION: A speed detection circuit A55 detects deviation of the input rate by using signals 3T to 11T, then expresses the input rate in seven stages, and switches the freerunning frequency of a PLL clock generation circuit 54. A speed detection circuit B56 detects the signal 11T and detects how much its width is deviated from a standard value. An output of the speed detection circuit A55 or B56 is selected by a switch 57 in accordance with the quantity of distortion of the input rate and is supplied to a control signal output section 58. Then, a control signal is supplied to a VCO 60 through a low-pass filter 59. |
