发明名称 |
ASIC ROUTING ARCHITECTURE |
摘要 |
A customizable ASIC routing architecture is provided. The architecture utilizes the uppermost metal layers of an ASIC composed of an array of function blocks for routing among function blocks while lower layers are used for local interconnections within the function blocks. The second-to-uppermost metal layer is fixed and generally includes a plurality of parallel segmented conductors extending in a first direction. The uppermost metal layer is customizable in a predesignated manner. Metal in the uppermost metal layer is selectively placed in tracks, which are substantially perpendicular to the segmented conductors in the layer below. Vias are provided between the two uppermost layers. One embodiment of the invention permits one-mask customization of an ASIC. |
申请公布号 |
WO9925023(A1) |
申请公布日期 |
1999.05.20 |
申请号 |
WO1998US22985 |
申请日期 |
1998.10.29 |
申请人 |
LIGHTSPEED SEMICONDUCTOR CORPORATION |
发明人 |
HOW, DANA;SRINIVASAN, ADI;EL GAMAL, ABBAS |
分类号 |
H01L21/822;H01L21/82;H01L27/02;H01L27/04;H01L27/118 |
主分类号 |
H01L21/822 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|