| 摘要 |
A method for forming a contact hole of a capacitor of a DRAM cell is disclosed. The method includes forming a first conductive layer on a semiconductor substrate, and forming a first dielectric layer on the first conductive layer. After patterning to etch the first dielectric layer and the first conductive layer, a second dielectric layer is formed on the semiconductor substrate and the first dielectric layer. Next, the second dielectric layer is anisotropically etched back to form a first spacer on sidewalls of the first dielectric layer and the first conductive layer. A first silicon oxide layer is formed over the semiconductor substrate, the first dielectric layer, the first spacer, followed by patterning to etch the first silicon oxide layer, wherein the first spacer and the first dielectric layer are used for facilitating self-aligned etching. Thereafter, a second conductive layer is formed over the semiconductor substrate, wherein surface of the first silicon oxide layer is exposed, and a second silicon oxide layer is formed over the second conductive layer and the first silicon oxide layer. Finally, patterning to etch a portion of the second silicon oxide layer to expose a portion of the second conductive layer, therefore a contact hole of the capacitor is formed.
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