| 摘要 |
A circuit and method for detecting when converting a number from a floating point format to a fixed point format will result in a loss of precision. All bits but the most significant bit of the exponent of the floating point number are inverted. This results in a transformed exponent that is input to a comparator. The mantissa of the floating point number is input to a signed trailing one detector (STOD). The STOD outputs a signed number that indicates the bit position of the least significant logical "1" in the mantissa, plus a bias number. The bias number is chosen to be the number of bits in the fractional part of the fixed point format minus the number of bits in the mantissa. The output of the STOD is input to the other input of the comparator. The output of the comparator indicates whether or not a loss of precision occurs.
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