发明名称 |
Semiconductor device in which an increase in threshold voltage, resulting from back-gate bias effect is mitigated, and method of manufacturing the same |
摘要 |
Disclosed herein is a semiconductor device comprising a semiconductor substrate, a well region provided in the surface of the substrate, a plurality of MOSFETs provided in the well region. The well region has parts having a low surface impurity concentration. Some of the MOSFETs have their channel regions provided in those parts of the well region which have the low surface impurity concentration. The other MOSFETs have their channel regions provided in other parts of the well region.
|
申请公布号 |
US5905292(A) |
申请公布日期 |
1999.05.18 |
申请号 |
US19980129836 |
申请日期 |
1998.08.06 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
SUGIURA, SOUICHI;KOYANAGI, MASARU |
分类号 |
H01L27/088;H01L21/8234;H01L21/8238;H01L27/092;H01L27/108;(IPC1-7):H01L29/78 |
主分类号 |
H01L27/088 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|