发明名称 Semiconductor memory apparatus
摘要 It is an object of the present invention to provide a semiconductor memory apparatus that provides a large determination margin for reading operation. A semiconductor memory apparatus includes a memory cell array having a common source line disposed between first memory cells and second memory cells, a comparison cell pair (first and second comparison cells) and a read circuit. The comparison cells are formed by the same manufacturing process as that of the memory cells. The read circuit includes a comparison cell selection circuit for selecting one of the comparison cells. When a memory cell is read, the comparison cell selection circuit selects one of the comparison cells that corresponds to the memory cell. A plurality of comparison cell pairs may be provided and comparison cells thereof may be connected in parallel with one another. In this case, the size of each transistor of a current mirror circuit included in a sense amplifier is adjusted in accordance with the number of the comparison cell pairs. The semiconductor memory apparatus is applicable to memories whose source and drain regions are formed by diagonal ion implantation.
申请公布号 US5905676(A) 申请公布日期 1999.05.18
申请号 US19980040278 申请日期 1998.03.18
申请人 SEIKO EPSON CORPORATION 发明人 OHWA, YOSHIHITO
分类号 G11C16/04;G11C16/06;G11C16/28;H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C16/06 主分类号 G11C16/04
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