Integrated circuit with follower synchronization PLL circuit

摘要

The PLL circuit (2) controls the oscillation frequency of the VCO (5), according to the comparison of the phase of the oscillating output signal (105) and an external clock signal (100). A device (7) delays the oscillating output signal by a preset time period. The integrated circuit is operated using the delayed signal (106). The delay device delay time period is changed by a control signal (107) to correspond to the result of the phase comparison. The PLL circuit comprises a phase detector (3), a low pass filter (4), and the VCO.