发明名称 Method of positioning an I.C. and IC handler utilizing said method
摘要 PCT No. PCT/JP96/01455 Sec. 371 Date Jul. 10, 1997 Sec. 102(e) Date Jul. 10, 1997 PCT Filed May 29, 1996 PCT Pub. No. WO97/24913 PCT Pub. Date Jul. 10, 1997An object of the present invention is to provide a method of positioning ICs and an IC handler utilizing the method in which a vertical mechanism is not provided in a positioning mechanism. In the IC handler, a positioning wall piece encloses a table, it has two pairs of inner faces, each pair of which are facing each other, lower portions S of each pair are formed into vertical faces and mutually separated with a distance corresponding to outermost edges of the IC, upper portions T of each pair are formed into slope faces whose distance is gradually made longer in an upward direction. An elastic member elastically supports the positioning wall piece, which is capable of moving vertically. The vertical mechanism is located above the positioning mechanism and pushes the positioning wall piece downwardly so as to correspond the upper face of the table to the upper portions T when the IC is mounted on the table, and allows movement of the positioning wall piece upwardly so as to correct a horizontal deviation of the IC by the slope faces and to position the same by the vertical faces after the IC is mounted on the table.
申请公布号 US5901829(A) 申请公布日期 1999.05.11
申请号 US19970809866 申请日期 1997.04.02
申请人 KABUSHIKI KAISHA SHINANO ELECTRONICS 发明人 ITO, MASATO
分类号 G01R31/26;G01R31/28;H01L21/68;H05K13/02;H05K13/04;(IPC1-7):B65G15/64;B65G21/22;B65G47/22;B65G47/24 主分类号 G01R31/26
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