发明名称 METHOD FOR GENERATING ERROR CORRECTION CODE
摘要 PROBLEM TO BE SOLVED: To improve an error correction capability by producing a 1st parity and performing error correction coding to information of prescribed quantity after adding dummy information of quantity which does not fill prescribed quantity even if a 2nd parity is add to effective information. SOLUTION: A data quantity control circuit 113 decides a rate of an MPEG signal, based on an inputted MPEG signal (a), and decides data quantity that is added to match with a digital (D) record rate. When additional data quantity that is decided by the circuit 113 is less than 12 synchroblocks, a synthetic circuit 116 synthesizes stuffing data (d) of quantity that corresponds to NP data (b), TP data (c) and additional data quantity. Also, when decided additional data quantity is 12 synchroblocks or more, the circuit 116 synthesizes the NP data (b), the TP data (c), an ECC parity (e) and the stuffing data (d). In this way, a 1st parity is produced to prescribed quantity of information and error correction coding is performed.
申请公布号 JPH11127419(A) 申请公布日期 1999.05.11
申请号 JP19970291218 申请日期 1997.10.23
申请人 SANYO ELECTRIC CO LTD 发明人 ONAKA TAKASHI;TOMIKAWA MASAHIKO;MINECHIKA SHIGEKAZU;MURASHIMA HIROSHI
分类号 H04N5/92;G11B20/12;G11B20/18;H03M13/00;H04N7/24;H04N19/00;H04N19/44;H04N19/65;H04N19/70;H04N19/89 主分类号 H04N5/92
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