| 摘要 |
PROBLEM TO BE SOLVED: To provide a PLL circuit with a short time for locking and less jitter. SOLUTION: A phase frequency comparator circuit section 10 is provided with a 1st phase frequency comparator 10a having no substantial blind sector Dz in the phase frequency difference detection characteristic and with a 2nd phase frequency comparator 10b having a prescribed blind sector Dz of a prescribed width in the phase frequency difference detection characteristic. When a phase/frequency difference between a reference signal REFCLK and a generated signal DEVCLK is large, the 1st and 2nd phase frequency comparators 10a, 10b detect a phase frequency difference, and in the case that the difference is very small to a degree of not detected by the 2nd phase frequency comparator 10b, only the 1st phase frequency comparator 10a detects the phase/frequency difference. Thus, a current supplied from a charge pump circuit section 20 to a low pass filter 31 large when the phase/frequency difference between the reference signal REFCLK and the generate signal DEVCLK is large, and the current supplied from the charge pump circuit section 20 to the low pass filter 31 is small when the phase/frequency difference between the reference signal REFCLK and the generated signal DEVCLK is small. |
