| 摘要 |
PROBLEM TO BE SOLVED: To speed up the operation by shortening the write cycle. SOLUTION: In this semiconductor memory having cells arranged in a matrix form, each cell is controlled by a driver transistor(Q1) and a readout word line, also by a readout transistor(Q2) which outputs data readout to a readout bit line and writing word line, by a writing transistor(Q3) which supplies the writing data from the writing bit line to a cell capacitor connected to the gate of the driver transistor and column writing selection signal, and has a column writing selection transistor(Q4) which is connected to the above writing transistor in series, and at the time of data writing, supplies the writing data supplied from the writing bit line to the cell capacitor through both the column writing selection transistor and the writing transistor connected to the word line. |
