发明名称 PHASE LOCKED LOOP
摘要 The loop comprises an oscillator (5), usually made as a voltage controlled oscil lator (VCO), arranged to operate selectively according to different input/output characteristics. The circuit further comprises means (81) to selectively control the operation of the oscillator (5) thereby making the oscillator (5) itself operate on one of said characteristics selectively determined according to the operating condition s of the loop (1).
申请公布号 CA2253583(A1) 申请公布日期 1999.05.06
申请号 CA19982253583 申请日期 1998.11.04
申请人 CSELT - CENTRO STUDI E LABORATORI TELECOMMUNICAZIONI S.P.A. 发明人 BURZIO, MARCO
分类号 H03K5/26;H03K3/027;H03K3/03;H03L7/093;H03L7/099;H03L7/10;H04L7/033;(IPC1-7):H03L7/085;H03L7/08 主分类号 H03K5/26
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