发明名称 THREE-LEVEL NEUTRAL POINT CLAMPING INVERTER CIRCUIT
摘要 A three-level neutral point clamping inverter circuit comprising a positive bus (4), a negative bus (5), a neutral conductor (6), first and second IGBTs (11, 12) serially connected between the positive bus (4) and a phase voltage output terminal (10), and third and fourth IGBTs (13, 14) serially connected between the negative bus (5) and the phase voltage output terminal (10), wherein a first snubber capacitor (21) is provided between the positive bus (4) and the neutral conductor (6), a second snubber capacitor (22) is provided between the negative bus (5) and the neutral conductor (6), and a first snubber diode (23) whose cathode is connected to the positive bus (4) and whose anode is connected to the phase voltage output terminal (10) and a second snubber diode (24) whose anode is connected to the negative bus (5) and whose cathode is connected to the phase voltage output terminal (10) are provided.
申请公布号 CA2308080(A1) 申请公布日期 1999.05.06
申请号 CA19982308080 申请日期 1998.10.27
申请人 KABUSHIKI KAISHA YASKAWA DENKI 发明人 YAMADA, KENJI;YAMANAKA, KATSUTOSHI;KUMAGAE, AKIRA;TERADA, TAKAAKI
分类号 H02M7/483;(IPC1-7):H02M7/538 主分类号 H02M7/483
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