发明名称 Simulation method and apparatus for semiconductor integrated circuit
摘要 The invention provides a simulation method and apparatus for a semiconductor integrated circuit which can perform simulation of an operation characteristic of each of a plurality of circuit blocks of a semiconductor integrated circuit and simulation of simultaneous operation characteristics when a plurality of ones of the circuit blocks operate simultaneously and allows evaluation of counter-electromotive forces or the like which may cause a malfunction due to mutual intervention of the circuit blocks after the semiconductor integrated circuit is manufactured as a product. The simulation apparatus comprises a first simulation section for executing simulation of an operation characteristic for each circuit block, a first determination section for determining a result of the simulation, a library in which data regarding mutual intervention which occurs when a plurality of ones of the circuit blocks operate simultaneously are stored, a second simulation section for executing simulation of simultaneous operation characteristics using the data of mutual intervention stored in the library, and a second determination section for determining a result of the simulation of the second simulation section.
申请公布号 US5901305(A) 申请公布日期 1999.05.04
申请号 US19970949818 申请日期 1997.10.14
申请人 NEC CORPORATION 发明人 FUTAGAMI, TOMOYUKI
分类号 H01L21/82;G06F11/26;G06F17/50;(IPC1-7):G06F17/50 主分类号 H01L21/82
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