| 摘要 |
An apparatus which allows the pulse duration of the high voltage pulses used in the programming and erase operations of a non-volatile memory system to be determined by an external timing signal instead of the internal timer normally used. Control of the pulse duration by the internal timer is disabled by gating the timer output signal with the external signal in a manner such that the gate output signal (which triggers the end of the high voltage pulse) is only generated when the external timing signal has a predetermined value. By controlling the value of the external timing signal, the pulse duration can be varied and have values other than those which would result from use of the internal timer.
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