发明名称 Switched-mode power supply having a delay-insensitive timing in the control loop
摘要 A flyback converter including a transformer (6) having a primary winding (4) and a switching transistor (2), arranged in series therewith; control device (14) for closing the switching transistor (2) during a primary interval and opening the switching transistor (2) during a secondary interval in response to a control signal (Uc), an auxiliary winding (12) for generating a feedback signal (UFB), measurement device (20) for unidirectionally measuring the feedback signal (UFB), a comparator (16) and a logic circuit (18) for deriving from the feedback signal (UFB) a first timing signal (TM1) which is representative of the secondary interval; comparison device for comparing the unidirectionally measured feedback signal (IFB) with a reference signal (IR) during the secondary interval, and an integrator (28) for generating the control signal (UC) in response to the comparison. The switched-mode power supply further includes a logic circuit (32) for generating a second timing signal (TM2) having a starting instant which falls within the primary interval having an end instant which at least does not precede the end instant of the secondary interval. A first time-selective element (26) transfers the reference signal (IR) under command of the first timing signal (TM1), and a second time-selective element (30) transfers the unidirectionally measured feedback signal (IFB) under command of the second timing signal (TM2). As a result of this, the output voltage of the flyback converter is not affected by errors which are caused by a delay in the generation of the first timing signal (TM1).
申请公布号 US5901052(A) 申请公布日期 1999.05.04
申请号 US19980033729 申请日期 1998.03.03
申请人 U.S. PHILIPS CORPORATION 发明人 STRIJKER, JOAN W.
分类号 H02M3/28;H02M3/335;(IPC1-7):H02M3/335 主分类号 H02M3/28
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