| 摘要 |
PROBLEM TO BE SOLVED: To provide the frequency synthesizer with an excellent characteristic where no spurious component is included in an output signal. SOLUTION: A frequency divider 32 of the frequency synthesizer 2 changes a frequency division value periodically, an external output signal OUT outputted from an oscillator 31 is frequency-divided by a mean frequency division value to generate a comparison signal, a phase comparator 34 compares a phase of a comparison signal with a phase of a reference clock signal and controls the oscillator 31 so that the frequency of the external output signal OUT is a multiple of a mean frequency division value of the frequency of the reference clock signal, a voltage applied to a capacitor in a compensation circuit 10 is changed suddenly and a compensation current is generated to cancel a ripple current produced in synchronism with the reference clock signal. Since the compensation current is produced by the capacitor, excellent response performance is obtained and the charge by the compensation current is easily controlled. |
