| 摘要 |
PROBLEM TO BE SOLVED: To provide a data output device which prevent repetitive output of data without increasing a processing load on a data writer side. SOLUTION: The data output device is provided with a memory control circuit 200 that has an address counter 201 designating one address of a data memory to one period of a clock signal given externally, a gate circuit 202 generating silence data denoted in FFh in a low timing of the clock signal, and a pull-up resistor 203. Then the clock signal is given to the data memory as a read/write designation signal and when the clock signal is at a high level, data of an area denoted by the address designated by the address counter 201 are read and when the clock signal just after is at a low level, the silence data in FFh are written in the area denoted by the address. |
