| 摘要 |
PROBLEM TO BE SOLVED: To equally maintain an upper limit of a power supply potential capable of stable operation at the time data is read from a ROM cell, independently of the position from a conductive region, by forming a pattern region for correcting the reading characteristics of a cell transistor around the periphery or in the inside of a memory cell array. SOLUTION: Characteristic-correcting dummy patterns 10 are formed so that interconnection patterns on both sides of a main ground line CL1 on the outermost end near a conductive region 60 becomes similar to interconnection patterns on both sides of a main ground line CL2 or the like located in the middle of a cell array. That is, a dummy bit line BLd and a dummy column line CLd are sequentially inserted between the line CL1 on the outermost end and the region 60, and a plurality of ROM cells, a plurality of bank selection transistors and a plurality of group selection transistors are connected to the lines BLd and CLd in a manner similar to those in the middle of the cell array. |
