发明名称 MODIFIED THIRD ORDER PHASE-LOCKED LOOP
摘要 <p>A phase-locked loop circuit is disclosed which exhibits a wide capture range and a low quality factor (Q) to prevent ringing and improve stability without adding area, increasing power consumption or increasing noise levels. The phase-locked loop includes a comparator to generate an error signal, an oscillator which generates an output signal in response to a control signal and a loop filter which generates the control signal based on the error signal. The loop filter includes a first integrator operatively coupled through a threshold limit detector to a second integrator. The threshold limit detector supplies an electric charge to the second integrator only when the first integrator is proximate to either an upper limit or a lower limit of the first integrator's operating range. The oscillator generates the output signal which tracks the input reference signal frequency as an integer multiple of the input reference signal frequency. The oscillator generates the output signal in response to varying current levels of the control signal. The loop filter further includes a pump-up and a pump-down charge pump that act in tandem under activation by the threshold limit detector. The loop filter includes a duty cycle limiter switch that limits the supply of the charge to the second integrator to a predetermined time period.</p>
申请公布号 WO1999021283(A1) 申请公布日期 1999.04.29
申请号 US1998022138 申请日期 1998.10.20
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