| 摘要 |
A level comparator has a first and a second input terminal, an output terminal and a first and a second power terminal. In the comparator, the gate of a first MOS transistor is connected to the first input terminal. The gate of a second MOS transistor is connected to the second input terminal and the source of the second MOS transistor is connected to the source of the first MOS transistor. A current source is connected between the source of the first MOS transistor and the first power terminal. The drain and gate of a third MOS transistor are connected to the drain of the first input terminal and the source of the third MOS transistor is connected to the second power terminal. The drain of a fourth MOS transistor is connected to the drain of the second MOS transistor. The gate of the fourth MOS transistor is connected to the gate of the third MOS transistor. And the source of the fourth MOS transistor is connected to the second power terminal. The drain of a fifth MOS transistor is connected to the output terminal. The gate of the fifth MOS transistor is connected to the drain of the second MOS transistor. And the source of the fifth MOS transistor is connected to the second power terminal. A load is connected between the output terminal and the first power terminal. An increase in gate voltage of the fifth MOS transistor is restricted by a restricting circuit.
|
