Semiconductor memory having redundant memory cell array

摘要

To make a read/write test on a redundant memory and to realize the detection of faults of the redundant memory cell array in advance, there are provided a first control circuit which inhibits the activation of word lines for selecting a normal memory cell array in response to a test signal and a second control circuit which activates redundant word lines for selecting a redundant memory cell array in response to the test signal.