| 摘要 |
A voltage Vdd-Vee amplified by a differential amplification circuit is provided to a common mode feedback circuit which controls an average potential of the Vdd and Vee to be constant by controlling a gate potential of an E-FET and to a level shift & common mode feedback circuit which controls an average potential of VDD and VBB to be constant by controlling a current mirror circuit having E-FETs via resistors and a diode. Output voltage VAA-VBB is used as an source & input voltage of a voltage controlled oscillator in a PLL circuit using a high frequency. Instead of the level shift & common mode feedback circuit, a differential offset circuit can be used with a pair of current being approximately equal to each other.
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