发明名称 Read circuit for memory
摘要 A memory read circuit includes an input to be connected to a bit line to which there are connected memory cells, and an output to produce an output logic potential. A current source produces a first current and a current-voltage converter produces the output logic potential. This potential represents the value of a second current obtained by the rerouting of a part of the first current towards the bit line when one of the cells is read, so that once the bit line is charged, the value of this second current is determined solely by the state of the selected cell and is independent of the equivalent capacitive load of the bit line.
申请公布号 US5898622(A) 申请公布日期 1999.04.27
申请号 US19970970844 申请日期 1997.11.14
申请人 SGS-THOMSON MICROELECTRONICS, S.A. 发明人 FERRANT, RICHARD
分类号 G11C7/06;(IPC1-7):G11C7/00 主分类号 G11C7/06
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