| 摘要 |
A manufacturing method of a semiconductor integrated circuit utilizing a trench isolated region to control the occurrence of parasitic transistors without narrowing the element region by forming first and second openings 4A, 4B on a silicon substrate for the purpose of element isolation, forming an amorphous silicon film thereon, then leaving the amorphous silicon film behind only a surface of a side wall of the opening by performing anisotropy etching. After oxidizing the surface of the amorphous silicon film and inside base, the opening is filled with a silicon oxide film.
|
