发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND ITS DESIGN
摘要 <p>PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit which can releaving simultaneous switching effects in a clock tree at the time of clock-switching operation, without degrading the performances of a synchronization circuit in the semiconductor integrated circuit to thereby increase its reliability, and a method for designing the semiconductor integrated circuit. SOLUTION: A synchronization circuit in a semiconductor integrated circuit includes registers D1, D2 and D3, to which clocks are supplied from clock buffers B0, B1, B2 and B3 forming a clock tree, and random logics C1, C2 and C3 for data transfer between the registers. Delay elements A1 and A2 for providing such delays within a range as to ensure holding of the registers are inserted between the clock buffers.</p>
申请公布号 JPH11111854(A) 申请公布日期 1999.04.23
申请号 JP19970272273 申请日期 1997.10.06
申请人 NEC CORP 发明人 OTANI TOSHIHIKO
分类号 H01L21/822;G06F1/12;G06F17/50;H01L21/82;H01L27/04;(IPC1-7):H01L21/82 主分类号 H01L21/822
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