发明名称 CONTROLLING METHOD FOR THE NUMBER OF TIMES OF ERASING OF FLASH MEMORY AND DATA PROCESSING DEVICE USING IT
摘要 <p>PROBLEM TO BE SOLVED: To realize a controlling method for the number of times of erasing of a flash memory in which a control information region is preserved even when power failure is caused during rewriting data, a control information region can be reduced, and the situation in which a control sector reaches the pre scribed number of times of erasing quickly can be evaded. SOLUTION: When a controlled object data sector is not yet erased, in all data of first to (n) bites of a control sector, $7F is written in a first bite B1 of the control sector in first erasing of an object data sector with $ FF, and a D7 bit is made '0'. D6-D1 bits of the first bite B1 are made '0' every erasing of 2nd to 7th of an object data sector, $00 is written in the first bite B1 in erasing of 8th in an object data sector, and a D0 bit of the first bite B1 is made '0'. If the control sectors are (n) bites in all, $01 is written in (n)th bites Bn in erasing of (8×n-1)th of an object data sector, a D1 bit of (n)th bite Bn is made '0'. $00 is written in (n)th bites Bn in erasing of (8×n)th of an object data sector, a D0 bit of (n)th bite Bn is made '0'.</p>
申请公布号 JPH11110983(A) 申请公布日期 1999.04.23
申请号 JP19970272439 申请日期 1997.10.06
申请人 HITACHI LTD 发明人 HAYASHI KAZUYA
分类号 G11C16/02;(IPC1-7):G11C16/02 主分类号 G11C16/02
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