发明名称 METHOD AND APPARATUS FOR PACKAGING HIGH TEMPERATURE SOLID STATE ELECTRONIC DEVICES
摘要 <p>A semiconductor-chip (11) is bonded to a chip-carrier substrate (12) by way of a gold-to-gold bonding interface. A vacuum chuck (63) is provided to physically hold the semiconductor-chip (11) in physical contact with the chip-carrier substrate (12) as static force (61), ultrasonic power, and an elevated temperature are applied to two mating gold surfaces that are formed by two continuous and physically mating gold layers. The bonded assembly is encased in potting ceramic, or the bonded assembly is encased in a housing that includes a transparent cover that enables use as an optoelectronic semiconductor device.</p>
申请公布号 WO1999019906(A2) 申请公布日期 1999.04.22
申请号 US1998021295 申请日期 1998.10.08
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