发明名称 Improvements in or relating to electrical bistable circuits
摘要 730,892. Transistor mufti-stable-state circuits. STANDARD TELEPHONES & CABLES, Ltd. Oct. 9, 1952, No. 25326/52. Class 40 (6). [Also in Group XIX] A multi-stable-state circuit comprises two transistors, each of which has a currentamplification factor of such value and a resistor in its base circuit of such value that by virtue of positive feed-back it has only two stable states, in one of which it is conducting and in the other of which it is non-conducting, and an interconnection from one electrode of one transistor to a like electrode of the other transistor such that on applying a pulse to a transistor in its non-conducting state to cause it to assume its conducting state, the other transistor, if it is already conducting, is caused to assume its non-conducting state. In the circuit shown in Fig. 2, the collectors of the transistors are interconnected by condenser Cl, while the emitters are connected to bias sources through current limiting resistors R1, R2. Control pulses are applied through condensers C2, C3 to the bases of the transistors. The circuit is initially set so that one transistor is conducting while the other is not. On the application of a short negative pulse to the base of the non-conducting transistor it is caused to conduct, thus applying a positive pulse through Cl to the other transistor and switching it off. By applying a second negative pulse to the base of the other transistor, the original state of the circuit can be restored. The interconnection between collectors may also be achieved by using a common collector circuit resistor for the two transistors. In alternative circuits, Figs. 4 and 5 (not shown), the bases and the emitters are interconnected respectively. When short-duration triggering pulses are used so that the pulses produced at the collectors persist after the end of the triggering pulses, the bases may be pulsed together, the application of a negative pulse to the base electrodes in parallel causing a change of state independently of which transistor is conducting and which is non-conducting. Fig. 3 shows a circuit having a single triggering pulse input P but designed to operate with pulses of long duration. The negative-going edges of the input pulses are passed by the rectifiers. MR1, MR2 and differentiated by circuits C5, R5 and C6, R8 to produce short negative pulses at the transistor base electrodes. However, due to the large-valued resistors, R6, R7, the positive-going edges of the input pulses are prevented from producing corresponding positive pulses at the bases Fig. 6, (not shown), shows a seale-of-two counting chain, employing a plurality of circuits of the type shown in Fig. 3, an output taken from an emitter electrode of one transistor pair being connected through a wave-shaping circuit comprising a limiting transistor amplifier to the input P of the succeeding transistor pair.
申请公布号 GB730892(A) 申请公布日期 1955.06.01
申请号 GB19520025326 申请日期 1952.10.09
申请人 STANDARD TELEPHONES AND CABLES LIMITED 发明人 BRAY FREDERICK HARRY;KNIGHT RONALD GEORGE
分类号 G06F7/38;G06F7/50;G06F7/504;G11C11/411;G11C19/28;H03B19/14;H03K3/26;H03K3/28;H03K3/286;H03K3/30;H03K17/64;H03K19/082;H03K23/00;H04L25/24;H04Q1/36 主分类号 G06F7/38
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