| 摘要 |
An interleaved differential analog-to-digital converter which allows differential analog-to-digital conversion of interleaved segments of two or more analog signals to be converted without loss of partial bits at the end of each conversion segment. The converter utilizes a separate feedback capacitor for each analog signal to be converted, together with a switch for switching the feedback capacitor into the circuit when the respective analog input is to be converted and for switching the respective capacitor out of the circuit when the respective analog input signal is not being converted. Thus, each feedback capacitor, when switched out of the circuit, will retain a charge representing whatever fraction of a bit remained thereon when switched out of the circuit, so that when switched back into the circuit, the conversion of the next respective analog signal segment may begin from that value of charge. Thus, loss of fractional bits at the end of the conversion of each segment is prevented. Various embodiments are described.
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