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发明名称
SIMULATION METHOD FOR RELIABILITY OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要
申请公布号
JPH1197676(A)
申请公布日期
1999.04.09
申请号
JP19970250577
申请日期
1997.09.16
申请人
MATSUSHITA ELECTRON CORP
发明人
KOIKE NORIO
分类号
H01L29/78;H01L21/336;H01L21/8238;H01L27/092;(IPC1-7):H01L29/78;H01L21/823
主分类号
H01L29/78
代理机构
代理人
主权项
地址
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