发明名称 SINGLE-CHIP ARCHITECTURE FOR SHARED-MEMORY ROUTER
摘要 The invention provides a single-chip method. The method includes a memory shared among packet buffers for receiving packets, packet buffers for transmitting packets, and packet header buffers for packet forwarding lookup. Accesses to that shared memory are multiplexed and prioritized. Packet reception is performed with relatively high priority, packet transmission is performed with medium priority, and packet forwarding lookup is performed with relatively low priority. The single-chip method includes circuits for serially receiving packet header information, converting that information into a parallel format for transmission to an SRAM for lookup, and queuing input packets for later forwarding at an output port. Similarly, the single-chip method includes circuits for queuing output packets for transmission at an output port, receiving packet forwarding information from the SRAM in a parallel format, and converting packet header information from output packets into a serial format for transmission. The single-chip method also includes a region in its shared memory for a packet forwarding table, and circuits for performing forwarding lookup responsive to packet header information.
申请公布号 WO9917182(A2) 申请公布日期 1999.04.08
申请号 WO1998US20627 申请日期 1998.09.29
申请人 CISCO TECHNOLOGY, INC. 发明人 BECHTOLSHEIM, ANDREAS;CHERITON, DAVID, ROSS
分类号 H04L12/56;(IPC1-7):G06F/ 主分类号 H04L12/56
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