发明名称 |
Distributed gated clock driver |
摘要 |
A gated clock driver is configured to provide an enable signal and a gated clock signal at each of a plurality flip-flops. One of the p-channel transistors of the gated clock driver's NOR gate is distributed to each of the flip-flops or latches in the system. Additionally, an extra n-channel transistor is provided in the gated clock circuit to form an inverter with the nondistributed p-channel transistor. More particularly, the p-channel transistor that is driven by the system clock input is distributed to each of the flip-flops. Similarly, the enable input (at the output of the new inverter) is distributed to each of the flip-flops. Since the gated clock signal cannot be generated without the enable signal being high and the system clock being low, distributing enable and the p-channel transistor which receives the system clock as an input minimizes clock skew as compared to flip-flops with a completely shared clock gating clock.
|
申请公布号 |
US5892373(A) |
申请公布日期 |
1999.04.06 |
申请号 |
US19970790393 |
申请日期 |
1997.01.29 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
TUPURI, RAGHURAM S.;HORNE, STEPHEN C. |
分类号 |
H03K3/037;(IPC1-7):H03K19/096 |
主分类号 |
H03K3/037 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|