System for sub-data processor identifies the peripheral from supplied identification data and supplies data indicative of the kind of peripheral to main data processor

摘要

PCT No. PCT/JP95/02072 Sec. 371 Date Sep. 24, 1996 Sec. 102(e) Date Sep. 24, 1996 PCT Filed Oct. 11, 1995 PCT Pub. No. WO96/12249 PCT Pub. Date Apr. 25, 1996A data processing apparatus achieves high-speed image control, image control responding rapidly to the content of the operation of a peripheral, avoidance of possible wrong recognition of the peripheral. A subCPU is connected through a CPU bus to a main CPU which provides image control, etc. When the main CPU delivers command data to the subCPU through a register table, the subCPU determines peripheral data collection timing and collects peripheral data from the peripheral at that timing. The main CPU receives through the register table the peripheral data collected by the subCPU. The subCPU receives the peripheral data ID-1 (identification data) twice. If both the values of those peripheral data are different, the main CPU determines that the peripheral has not been connected to the peripheral port.