发明名称 |
Flash memory array with two interfaces for responding to RAS and CAS signals |
摘要 |
An arrangement for accessing a non-volatile memory array including providing a signal having a first condition if an access is a read and a second condition if an access is for any other operation; reading data directly from an address in the non-volatile memory array if the signal is a first condition; and performing any other access of the non-volatile memory array utilizing a command-centric interface if the signal is a second condition.
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申请公布号 |
US5893135(A) |
申请公布日期 |
1999.04.06 |
申请号 |
US19950587799 |
申请日期 |
1995.12.27 |
申请人 |
INTEL CORPORATION |
发明人 |
HASBUN, ROBERT N.;GAFKEN, ANDREW H. |
分类号 |
G11C7/10;G11C16/26;(IPC1-7):G06F12/00;G06F13/00 |
主分类号 |
G11C7/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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