A method and implementing structures for a domino block circuit configuration includes a plurality of domino logic blocks including inverter circuits to provide inverted signals which are needed for a comprehensive logic analysis and processing. A plurality of clocking signals are applied at various clocking inputs throughout the circuit. The clocking signals are timed relative to each other in a timing sequence to assure that the logic circuit evaluations occur only after relevant data and switching signals have stabilized.
申请公布号
US5892372(A)
申请公布日期
1999.04.06
申请号
US19970790262
申请日期
1997.01.27
申请人
INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人
CIRAULA, MICHAEL KEVIN;LATTIMORE, GEORGE MCNEIL;MASLEID, ROBERT PAUL;MIKAN, JR., DONALD GEORGE