发明名称
摘要 PURPOSE:To unnecessitate the knowledge of computers and to easily perform scheduling by defining the scheduling work with the rearrangement of function blocks. CONSTITUTION:A logic construction interface part 12 of a processor 11 using the computer displays the function blocks for designating a prescribed program operation corresponding to special graphics such as rectangles. These plural graphics are combined and rearranged so as to edit an existent program for designating the operating contents and operating order of the program. Further, the parameter of the function block is adjusted, and the program of the logic of scheduling is completed. When an input element train enters the upper part, the respective function blocks graphically displayed on a display screen evaluate it based on element selection designated to those function blocks and when it coincides with the evaluation, an output element train is outputted to the lower adjacent function block but when it does not coincide, the output element train is outputted to the right side adjacent function block.
申请公布号 JP2880030(B2) 申请公布日期 1999.04.05
申请号 JP19920321897 申请日期 1992.12.01
申请人 YOKOGAWA DENKI KK 发明人 FUJIMURA SHIGERU;TAKAHASHI KOICHI;SAKAI HARUKO
分类号 G05B19/418;B65G61/00;G06Q10/00;G06Q10/06;G06Q10/10;G06Q50/00;G06Q50/04 主分类号 G05B19/418
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