发明名称 AUTONOMOUSLY CYCLING DATA PROCESSING ARCHITECTURE
摘要 <p>An electronic data processing circuit (4) is disclosed having at least an instruction memory (202), an instruction decoder (205), and a slot structure (209). The slot structure is characterized by a plurality of slots. Each slot has at least: (1) an address register, (2) a data register, (3) a function register, and (4) a monitoring circuit. Each slot asynchronously performs operations defined by the information content of their respective address register, data register and function register when complete information is present.</p>
申请公布号 WO1999015956(A1) 申请公布日期 1999.04.01
申请号 US1998019831 申请日期 1998.09.23
申请人 发明人
分类号 主分类号
代理机构 代理人
主权项
地址