A system having a bus (124) coupled to a host (102) and a memory device (108). The bus (124) may include a plurality of general purpose signal lines to carry time-multiplexed address, data, and control information. The memory device (108) may store system start-up information and communicate this information with the host (102) over the bus (124).
申请公布号
WO9915971(A1)
申请公布日期
1999.04.01
申请号
WO1998US13886
申请日期
1998.07.07
申请人
INTEL CORPORATION;GAFKEN, ANDREW, H.;BENNETT, JOSEPH, A.;POISNER, DAVID, I.
发明人
GAFKEN, ANDREW, H.;BENNETT, JOSEPH, A.;POISNER, DAVID, I.