发明名称 SYNCHRONOUS INTEGRATED CIRCUIT DEVICE
摘要 A synchronous semiconductor circuit device is constituted so that the time margin of a sense amplifier section can be reduced correspondingly to the reduction of cycle time by determining the activating timing of a positive feedback sense amplifier by using a clock edge which is different from a clock edge used for determining timing required for data to be input to the sense amplifier after the data has been transmitted to a bit line from a word line.
申请公布号 WO9916078(A1) 申请公布日期 1999.04.01
申请号 WO1997JP03327 申请日期 1997.09.19
申请人 HITACHI, LTD.;HITACHI ULSI ENGINNERING CORP.;AKIOKA, TAKASHI;YUKUTAKE, SEIGO;TOYOSHIMA, HIROSHI 发明人 AKIOKA, TAKASHI;YUKUTAKE, SEIGO;TOYOSHIMA, HIROSHI
分类号 G11C7/06;G11C7/10;H03K5/135;(IPC1-7):G11C11/413;G11C11/407 主分类号 G11C7/06
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